FPGAs and low latency trading - Williston Hayes - Optiver - FPL2020

i think somebody wants to buy 5 shares of apple at 10 euros

Sounds like a naive joker who stumbled on a scam to rip off pension funds

hhhh
good thanks its fun to hear

Lee George Lee James Young Ronald

What tools do use for testing?

Wish, I had found this earlier. I have been working on FPGA's and ASIC's since I started my career. Since last few years I have been trying to switch career into trading, especially algo trading. It's great to see FPGA at the core of HFT.

Here for ES3F1 👽👽👽👽

One other application where latency is extremely important is Trigger systems for high-energy collider physics experiments, like LHC in CERN. So hearing you say that standard Xilinx IPs aren't designed for optimal latency hits very close to home

So essentially you're saying c++ is no longer relevant here because the message doesn't even reach the software layer.

Thank you for this! I was often confused about where the latency happened in software applications and your presentation made me understand where it happens.

can you do it with DPU?

When I get to meet Williston, I want to ask him why haven't they designed an ASIC for trading yet? given that his team has had so much experience with FPGAs.

Do you use gRPC? How do you handle Head of Line blocking, especially when a latency penalty is heavy?

This is one the top presentation on low latency trading systems.. thanks a lot

Thank you guys. What a presentation! May I ask which FPGA and interactive broker do you use?

Very well-structured and cogent. Thank you

this is really cool, people often talk about FPGA's but this presentation was a great intro into how it can be used beneficially in the real world
great presentation!